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this is information on a product in full production. december 2013 docid024950 rev 3 1/26 l2g3is mems motion sensor: two-axis digital output gyroscope for optical image stabilization datasheet - production data features ? 65 dps / 130 dps full-scale range ? spi digital interface ? embedded temperature sensor ? integrated low- and high-pass filters with user- selectable bandwidth ? wide supply voltage range: 2.4 v to 3.6 v ? low-voltage compatible ios (1.8 v) ? power-down and sleep modes for smart power saving ? ecopack ? , rohs and ?green? compliant applications ? optical image stabilization description the l2g3is is a two-axis mems gyroscope for optical image stabilization applications. it includes a sensing element and an ic interface capable of providing the measured angular rate to the external world through an spi digital interface. the unique sensing element is manufactured using a dedicated micromachining process developed by stmicroelectronics to produce inertial sensors and actuators on silicon wafers. the ic interface is manufactured using a cmos process that allows a high level of integration to design a dedicated circuit which is trimmed to better match the sensing element characteristics. the l2g3is is available in a plastic land grid array (lga) package and can operate over a temperature range of -40 c to +85 c. lga-16 (3x3.5x1 mm) table 1. device summary order code temperature range (c) package packing l2g3is -40 to +85 lga-16 (3x3.5x1) tray L2G3ISTR -40 to +85 lga-16 (3x3.5x1) tape and reel www.st.com
contents l2g3is 2/26 docid024950 rev 3 contents 1 block diagrams and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 digital block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 terminology & functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 zero-rate level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 synchronous reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 mechanical and electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.3 temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.4 spi - serial peripheral interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.5 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4 application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 digital interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 spi bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1.1 spi write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1.2 spi read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 output register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7 register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.1 out_x_l (03h), out_x_h (04h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.2 out_y_l (05h), out_y_h (06h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.3 status_reg (09h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.4 ctrl_reg1 (0bh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.5 ctrl_reg2 (0ch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.6 ctrl_reg3 (0dh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
docid024950 rev 3 3/26 l2g3is contents 26 7.7 orient_config (10h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.8 ctrl_reg4 (15h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.9 ctrl_reg5 (1fh) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.10 ctrl_temp (20h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.11 out_temp (26h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 8 soldering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of tables l2g3is 4/26 docid024950 rev 3 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. mechanical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 4. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 5. temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 table 6. spi slave timing values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 7. external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 table 8. serial interface pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 9. register address map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 10. status_reg register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 11. status_reg description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 table 12. ctrl_reg1 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 14. operating mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 13. ctrl_reg1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 15. ctrl_reg2 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 16. ctrl_reg2 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 17. ctrl_reg3 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 19. low-pass filter cutoff frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 18. ctrl_reg3 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 20. orient_config register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 table 21. orient_config description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 0 table 22. directional orientation selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 23. ctrl_reg4 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 24. ctrl_reg4 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 25. ctrl_reg5 register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 26. ctrl_reg5 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 27. high-pass filter cutoff frequency selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 table 28. ctrl_temp register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 29. ctrl_temp description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 30. out_temp register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 31. out_temp description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 32. document revision history. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
docid024950 rev 3 5/26 l2g3is list of figures 26 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. digital block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. spi slave timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. l2g3is electrical connections and external component values . . . . . . . . . . . . . . . . . . . . . 14 figure 6. spi write protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 7. multiple byte spi write protocol (2-byte example). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 8. spi read protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 9. lga-16: mechanical data and package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
block diagrams and pin description l2g3is 6/26 docid024950 rev 3 1 block diagrams and pin description figure 1. block diagram 1.1 digital block diagram figure 2. digital block diagram mems sensor mux c- converter v sc filter adc digital filters spi bw selection actuation interface fs selection adc lpf hpf 0 1 hpf datareg spi
docid024950 rev 3 7/26 l2g3is block diagrams and pin description 26 1.2 pin description figure 3. pin connections table 2. pin description pin# name function 1 vdd_io power supply for i/o pins 2 res connect to gnd 3 res connect to gnd 4 gnd 0 v power supply 5 res leave unconnected 6 res connect to gnd 7 drdy data ready signal (open-drain pad) 8 res leave unconnected 9 res leave unconnected 10 sdi/sdo data-in, data-out line 11 scl clock line for spi interface 12 cs spi chip-select line 13 reg capacitance connection pin for internal regulator 14 cap capacitance connection pin for internal charge pump 15 vdd power supply 16 vdd power supply vdd_io res res gnd cs scl sdi/sdo res drdy res res cap vdd vdd reg 1 8 12 5 4 9 13 bottom view (top view) directions of the detectable angular rates x y res + + 16
terminology & functionality l2g3is 8/26 docid024950 rev 3 2 terminology & functionality 2.1 sensitivity an angular rate gyroscope is a device that produces a positive-going digital output for counterclockwise rotation around the sensitive axis considered. sensitivity describes the gain of the sensor and can be determined by applying a defined angular velocity to it. this value changes very little over temperature and time. 2.2 zero-rate level the zero-rate level describes the actual output signal if there is no angular rate present. the zero-rate level of highly accurate mems sensors is, to some extent, a result of stress to the sensor and therefore the zero-rate level can slightly change after mounting the sensor on a printed circuit board or after exposing it to extensive mechanical stress. this value changes very little over temperature and time. 2.3 synchronous reading on the l2g3is the angular rate data can be retrieved using a synchronous read. this functionality is recommended to improve the sensor performance. to perform a synchronous read when using the spi interface, the reg_en bit in ctrl_reg1 (0bh) has to be set to ?1?. then the drdy_en bit in ctrl_reg4 (15h) has to be set to '1' in order to enable the data ready interrupt on the drdy pin (refer to figure 5 ). to properly perform a synchronous read, the angular rate data have to be read every time the drdy pin goes low. 2.4 temperature sensor to retrieve the temperature data, the gyroscope has to be in sleep mode (pw<1:0> bit in ctrl_reg1 (0bh) set to ?10?), the reg_en bit in ctrl_reg1 (0bh) has to be set to ?1? and the temperature sensor can be enabled by setting the temp_en bit to ?1? in ctrl_temp (20h) . the temperature data can be retrieved from the out_temp (26h) register, as two?s complement data in 8-bit format left-justified. the output of the temperature sensor is 0 at 25 c. once the temperature data have been acquired, the temperature sensor has to be turned off to restart the acquisition of the angular rate data. the temp_en bit in ctrl_temp (20h) has to be set to ?0? and the gyroscope operative mode has to be changed to normal mode (pw<1:0> bit in ctrl_reg1 (0bh) set to ?11?).
docid024950 rev 3 9/26 l2g3is mechanical and electrical characteristics 26 3 mechanical and electrical characteristics 3.1 mechanical characteristics vdd = 3.3 v and t = 25 c unless otherwise noted (a) . a. the product is factory calibrated at 3.3 v. the operational power supply range is specified in table 4 . table 3. mechanical characteristics symbol parameter test condition min. typ. (1) max. unit fs measurement range 65 dps 130 so sensitivity fs = 65 dps 225 lsb/dps fs = 130 dps 112.5 sodr sensitivity change vs. temperature from -40 c to +85 c 3 % dvoff digital zero-rate level 5 dps offdr zero-rate level change vs. temperature from -40 c to +85 c 9 dps nl non-linearity (2) best-fit straight line 0.1 % fs rn rate noise density (2) 0 - 20 hz bandwidth 0.006 bw internal bandwidth lpf set to ?1? 370 hz phdl phase delay at 20 hz (370 hz bw selected) 4.5 deg odr digital output data rate 9.5 khz top operating temperature range -40 +85 c 1. typical specifications are not guaranteed. 2. guaranteed by design. dps hz ?? ?
mechanical and electrical characteristics l2g3is 10/26 docid024950 rev 3 3.2 electrical characteristics @ vdd = 3.3 v, t = 25 c unless otherwise noted (b) . b. the product is factory calibrated at 3.3 v. table 4. electrical characteristics symbol parameter test condition min. typ. (1) max. unit vdd supply voltage 2.42 3.3 3.6 v vdd_io i/o pins supply voltage (2) 1.71 vdd+0.1 v idd supply current in normal mode 6.4 ma iddsl supply current in sleep mode (3) 2.5 ma iddpdn supply current in power-down mode 20 a vih digital high-level input voltage 0.8*vdd_io v vil digital low-level input voltage 0.2*vdd_io v top operating temperature range -40 +85 c 1. typical specifications are not guaranteed. 2. it is possible to remove vdd maintaining vdd_io without blocking the communication busses, in this condition the measurement chain is powered off. 3. sleep mode introduces a faster turn-on time relative to power-down mode.
docid024950 rev 3 11/26 l2g3is mechanical and electrical characteristics 26 3.3 temperature sensor characteristics @ avdd = 3.3 v, t = 25 c unless otherwise noted (c) . c. the product is factory calibrated at 3.3 v. table 5. temperature sensor characteristics symbol parameter test condition min. typ. (1) max. unit tsdr temperature sensor output change vs. temperature 1 c/digit todr temperature refresh rate 1 hz tacc temperature absolute accuracy (2) 4 c top operating temperature range -40 +85 c 1. typical specifications are not guaranteed. 2. the output of the temperature sensor is 0 at 25 c. refer to section 2.4: temperature sensor on how to enable and read the temperature sensor output data.
mechanical and electrical characteristics l2g3is 12/26 docid024950 rev 3 3.4 spi - serial peripheral interface subject to general operating conditions for vdd and top. figure 4. spi slave timing diagram note: measurement points are done at 0.2vdd_io and 0.8vdd_io, for both input and output ports. table 6. spi slave timing values symbol parameter value (1) unit min max t c(spc) spi clock cycle 100 ns f c(spc) spi clock frequency 10 mhz t su(cs) cs setup time 5 ns t h(cs) cs hold time 8 t su(si) sdi input setup time 5 t h(si) sdi input hold time 15 t v(so) sdo valid output time 50 t h(so) sdo output hold time 6 t dis(so) sdo output disable time 50 1. values are guaranteed at 10 mhz clock frequency for spi, based on characterization results, not tested in production. spc cs sdi / sdo t su(cs) t v(so) t h(so) t h(si) t su(s i) t h(cs) t dis(so) t c(s pc ) msb in msb out lsb out lsb in (3) (3) (3) (3) sdi / sdo
docid024950 rev 3 13/26 l2g3is mechanical and electrical characteristics 26 3.5 absolute maximum ratings stresses above those listed as ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device under these conditions is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. note: supply voltage on any pin should never exceed 4.8 v. absolute maximum ratings symbol ratings maximum value unit avdd supply voltage -0.3 to 4.8 v havdd supply voltage -0.3 to 4.8 v vdd_io vdd io -0.3 to vdd v vin input voltage on: (cs, sdi/sdo, scl) -0.3 to vdd_io +0.1 v t stg storage temperature range -40 to +125 c sg acceleration g for 0.1 ms 10,000 g esd electrostatic discharge protection 2 (hbm) kv this device is sensitive to mechanical shock, improper handling can cause permanent damage to the part. this device is sensitive to electrostatic discharge (esd), improper handling can cause permanent damage to the part.
application hints l2g3is 14/26 docid024950 rev 3 4 application hints figure 5. l2g3is electrical connections and external component values power supply decoupling capacitors (100 pf + 1 f) should be placed as near as possible to the device (common design practice). a pull-up resistor must be added to the drdy line (open-drain pad). table 7. external components type description value purpose c1 1 f decoupling c2 100 pf decoupling c3 (1) 1. this value must guarantee a minimum of 1 nf value under 12 v bias condition. 10 nf (16 v class) charge pump c4 220 nf (5 v class) internal regulator avdd gnd c4 gnd gnd vdd_io vdd 1 8 12 5 4 13 16 top view (top view) directions of the detectable angular rates x y 14 gnd scl cs sdi/sdo reg c3 cap c1 c2 drdy res res res vdd vdd_io in case of synchronous reading for output data rpu= 10kohm drdy 9 + + res 1 res 1 1. this pin must be left unconnected res 1
docid024950 rev 3 15/26 l2g3is digital interfaces 26 5 digital interfaces the registers embedded inside the l2g3is may be accessed through the spi serial interfaces. 5.1 spi bus interface the spi is a bus slave. the spi allows to write and read the registers of the device. the serial interface interacts with the outside world with 3 wires: cs , scl , sdi/sdo . cs is the serial port enable and it is controlled by the spi master. it goes low at the start of the transmission and goes back high at the end. scl is the serial port clock and it is controlled by the spi master. it is stopped high when cs is high (no transmission). sdi/sdo is the serial port data input and output. this line is driven at the falling edge of scl and should be captured at the rising edge of scl . both the read register and write register commands are completed in 16 clock pulses or in multiples of 8 in case of multiple read/write bytes. bit duration is the time between two falling edges of scl . the first bit (bit 0) starts at the first falling edge of scl after the falling edge of cs while the last bit (bit 15, bit 23, ...) starts at the last falling edge of scl just before the rising edge of cs . 5.1.1 spi write figure 6. spi write protocol the spi write command is performed with 16 clock pulses. a multiple byte write command is performed by adding blocks of 8 clock pulses to the previous one. bit 0 : write bit. the value is 0. bit 1 : m s bit. when 0, does not increment the address; when 1, increments the address in multiple writes. bit 2 -7 : address ad(5:0). this is the address field of the indexed register. table 8. serial interface pin description pin name pin description cs chip-select line scl spi serial port clock sdi/sdo spi serial data input/output cs scl sdi/sdo rw di7 di6 di5 di4 di3 di2 di1 di0 ad5 ad4 ad3 ad2 ad1 ad0 ms
digital interfaces l2g3is 16/26 docid024950 rev 3 bit 8-15 : data di(7:0) (write mode). this is the data that will be written inside the device (msb first). bit 16-... : data di(...-8). further data in multiple byte writes. figure 7. multiple byte spi write protocol (2-byte example) 5.1.2 spi read figure 8. spi read protocol the spi read command is performed with 16 clock pulses: bit 0 : read bit. the value is 1. bit 1 : m s bit. when 0, does not increment the address; when 1, increments the address in multiple reads. bit 2-7 : address ad(5:0). this is the address field of the indexed register. bit 8-15 : data do(7:0) (read mode). this is the data that will be read from the device (msb first). a multiple read command is also available. cs scl rw ad5 ad4 ad3 ad2 ad1 ad0 di7 di6 di5 di4 di3 di2 di1 di0 di15 di14 di13 di12 di11 di10 di9 di8 ms sdi/sdo cs rw do7 do6 do5 do4 do3 do2 do1 do0 ad5 ad4 ad3 ad2 ad1 ad0 ms scl sdi/sdo
docid024950 rev 3 17/26 l2g3is output register mapping 26 6 output register mapping the table given below provides a listing of the 8-bit registers embedded in the device and the related addresses. registers marked as reserved must not be changed. writing to those registers may cause permanent damage to the device. to guarantee proper behavior of the device, all register addresses not listed in the above table must not be accessed and the content stored in those registers must not be changed. the content of the registers that are loaded at boot should not be changed. they contain the factory calibration values. their content is automatically restored when the device is powered up. table 9. register address map name type register address [hex] default [hex] comment reserved -- 00-02 -- reserved out_x_l r 03 output out_x_h r 04 output out_y_l r 05 output out_y_h r 06 output reserved r 07-08 -- reserved status_reg r 09 output reserved -- 0a -- reserved ctrl_reg1 rw 0b 01 ctrl_reg2 rw 0c 00 ctrl_reg3 rw 0d 00 orient_config rw 10 00 reserved -- 11-14 -- reserved ctrl_reg4 rw 15 00 reserved -- 16-1e -- reserved ctrl_reg5 rw 1f 00 ctrl_temp rw 20 04 reserved -- 21-25 -- reserved out_temp r 26 output
register description l2g3is 18/26 docid024950 rev 3 7 register description the device contains a set of registers which are used to control its behavior and to retrieve angular rate data. the register address, consisting of 7 bits, is used to identify them and to write the data through the serial interface. 7.1 out_x_l (03h), out_x_h (04h) x-axis angular rate data. the value is expressed as two?s complement. 7.2 out_y_l (05h), out_y_h (06h) y-axis angular rate data. the value is expressed as two?s complement. 7.3 status_reg (09h) 7.4 ctrl_reg1 (0bh) table 10. status_reg register yxor xor yor 0 yxda xda yda 0 table 11. status_reg description yxor x, y-axis data overrun. default value: 0 (0: no overrun has occurred; 1: new data has overwritten the previous data before it was read) xor x-axis data overrun. default value: 0 (0: no overrun has occurred; 1: new data for the x-axis has overwritten the previous data) yor y-axis data overrun. default value: 0 (0: no overrun has occurred; 1: new data for the y-axis has overwritten the previous data) yxda x, y-axis new data available. default value: 0 (0: a new set of data is not yet available; 1: a new set of data is available) xda x-axis new data available. default value: 0 (0: new data for the x-axis is not yet available; 1: new data for the x-axis is available) yda y-axis new data available. default value: 0 (0: new data for the y-axis is not yet available;1: new data for the y-axis is available) table 12. ctrl_reg1 register 0 (1) 1. these bits must be set to ?0? for proper operation of the device. 0 (1) 0 (1) 0 (1) bdu reg_en pw1 pw0
docid024950 rev 3 19/26 l2g3is register description 26 7.5 ctrl_reg2 (0ch) 7.6 ctrl_reg3 (0dh) table 13. ctrl_reg1 description bdu block data update. default value: 0. (0: output registers not updated until msb and lsb have been read; 1: output registers updated continuously) reg_en enables writing to ctrl_reg4 (15h) , ctrl_reg5 (1fh) and ctrl_temp (20h) . default value: 0 (1: enable write values in ctrl_reg4 (15h) , ctrl_reg5 (1fh) ) and ctrl_- temp (20h) ) pw[1:0] operating mode selection. default: 01. refer to table 14: operating mode selection . table 14. operating mode selection pw1 pw0 operating mode selection 0 0 power-down 0 1 power-down 1 0 sleep mode 1 1 normal mode table 15. ctrl_reg2 register 0 (1) 1. these bits must be set to ?0? for proper operation of the device. 0 (1) 0 (1) hpfreset0 hpfreset1 0 (1) swreset hpf table 16. ctrl_reg2 description hpfreset0 high-pass filter reset. default: 0 to reset the hpf, hpfreset1 or hpfreset0 has to be set to 1. (1: hpf reset on x-axis and y-axis) hpfreset1 high-pass filter reset. default: 0 to reset the hpf, hpfreset1 or hpfreset0 has to be set to 1. (1: hpf reset on x-axis and y-axis) swreset software reset. default: 0. (1: all control and output register values are restored to default values). hpf high-pass filter enable. default: 0. (0: high-pass filter is disabled; 1: high-pass filter is enabled) table 17. ctrl_reg3 register 0 (1) 1. these bits must be set to ?0? for proper operation of the device. 0 (1) 0 (1) 0 (1) 0 (1) 0 (1) 0 (1) lpf
register description l2g3is 20/26 docid024950 rev 3 7.7 orient_config (10h) 7.8 ctrl_reg4 (15h) to enable writing to the ctrl_reg4 (15h) register, the reg_en bit in ctrl_reg1 (0bh) has to be set to ?1?. table 18. ctrl_reg3 description lpf low-pass filter cutoff frequency selection. default value 0. (0: 120 hz; 1: 370 hz). if lpf2 in ctrl_reg5 (1fh) is set to ?1?, the cutoff frequency is set to 240 hz, independently of the value of lpf. table 19. low-pass filter cutoff frequency lpf lpf2 ( ctrl_reg5 (1fh) ) low-pass filter cutoff frequency selection 0 0 120 hz 1 0 370 hz 0 1 240 hz 1 1 240 hz table 20. orient_config register 0 (1) 1. these bits must be set to ?0? for proper operation of the device. 0 (1) sign_x sign_y 0 (1) orient_2 orient_1 orient_0 table 21. orient_config description sign_x x-axis angular rate sign. default 0. (0: sign unvaried; 1: sign inverted) sign_y y-axis angular rate sign. default 0. (0: sign unvaried; 1: sign inverted) orient[2:0] directional orientation selection. default 000. refer to table 22: directional orientation selection . table 22. directional orientation selection orient_2 orient_1 orient_0 directional orientation selection 0 0 0 x-axis - y-axis 0 1 0 y-axis - x-axis table 23. ctrl_reg4 register 0 (1) 1. these bits must be set to ?0? for proper operation of the device 0 (1) 0 (1) 0 (1) 0 (1) 0 (1) 0 (1) drdy_en
docid024950 rev 3 21/26 l2g3is register description 26 7.9 ctrl_reg5 (1fh) to enable writing to the ctrl_reg5 (1fh) register, the reg_en bit in ctrl_reg1 (0bh) has to be set to ?1?. table 24. ctrl_reg4 description drdy_en data ready enable on drdy pin. default 0. (1: drdy on pin). refer to section 2.3: synchronous reading . table 25. ctrl_reg5 register -- -- -- -- fs lpf2 hpf_bw1 hpf_bw0 table 26. ctrl_reg5 description fs full-scale selection. default value: 0 (0: 65 dps; 1: 130 dps) lpf2 enable low-pass filter 240 hz. default 0. if lpf2 is enabled, the cutoff frequency is set to 240 hz, independently of the value of the lpf bit in ctrl_reg3 (0dh) . refer to table 19: low-pass filter cutoff frequency . hpf_bw[1:0] digital high-pass filter cutoff frequency selection. default value 00. refer to table 27: high-pass filter cutoff frequency selection table 27. high-pass filter cutoff frequency selection hpf_bw1 hpf_bw0 hp cutoff frequency selection 0 0 0.02 hz 0 1 0.08 hz 1 0 4.85 hz 1 1 39.6 hz
register description l2g3is 22/26 docid024950 rev 3 7.10 ctrl_temp (20h) to enable writing to the ctrl_temp (20h) register, the reg_en bit in ctrl_reg1 (0bh) has to be set to ?1?. 7.11 out_temp (26h) table 28. ctrl_temp register 0 (1) 1. these bits must be set to ?0? for proper operation of the device. 0 (1) 0 (1) 0 (1) temp_en 1 (2) 2. this bit must be left at ?1? for proper operation of the device. 0 (1) 0 (1) table 29. ctrl_temp description temp_en temperature sensor enable. default 0 (0: temperature sensor is disabled; 1: temperature sensor is enabled). refer to: section 2.4: temperature sensor on how to enable and read the temperature sensor output data. table 30. out_temp register temp7 temp6 temp5 temp4 temp3 temp2 temp1 temp0 table 31. out_temp description temp7-temp0 temperature data. the value is expressed as two?s complement left-justified. the output of the temperature sensor is 0 at 25 c. refer to: section 2.4: temperature sensor on how to enable and read the temperature sensor output data.
docid024950 rev 3 23/26 l2g3is soldering information 26 8 soldering information the lga package is compliant with the ecopack ? , rohs and ?green? standard. it is qualified for soldering heat resistance according to jedec j-std-020. leave ?pin 1 indicator? unconnected during soldering. land pattern and soldering recommendations are available at www .st.com/mems .
package information l2g3is 24/26 docid024950 rev 3 9 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions and product status are available at: www.st.com. ecopack is an st trademark. figure 9. lga-16: mechanical data and package dimensions dimensions (mm) ref. min. typ. max. a1 1 a2 0.785 a3 0.200 d1 2.850 3.000 3.150 e1 3.500 l 1.750 n 0.500 m 0.040 0.100 0.160 m1 0.290 0.350 0.410 p 1.200 t1 0.290 0.350 0.410 t2 0.190 0.250 0.310 d 0.150 k 0.050 8409170_a
docid024950 rev 3 25/26 l2g3is revision history 26 10 revision history table 32. document revision history date revision changes 16-jul-2013 1 initial release 28-aug-2013 2 updated figure 5: l2g3is electrical connections and external component values moved figure 2: digital block diagram 05-dec-2013 3 document status promoted from preliminary data to production data; updated table 15: ctrl_reg2 register and table 16: ctrl_reg2 description
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